Mark Bohr, senior fellow at Intel's logic technology development organization in Hillsboro, Ore., said the two MPU photos — one of a dual-core processor, another of a single-core MPU — indicate that Intel has developed "65-nm product prototypes," which he declined to describe further.
Bohr said the photos show that Intel has "moved well beyond" the stage of making test SRAMs with the 65-nm process. Last November, Intel described a 70-Mbit test SRAM created with the 65-nm process.
Yonah had its initial coming out party in early September at the Intel Developers Forum. Last week at an Intel analysts meeting, CEO Paul Otellini reportedly demonstrated a computer running the Windows XP operating system based on what Intel said was a 65-nm version of its Pentium processor.
Though the chip photos were not included in the IEDM proceedings, the photos and Otellini's demonstration are the latest indications from Intel that it is on track to introduce its first 65-nm processors next year. Intel's schedule calls for its 65-nm process to move to early commercial production in the second half of 2005.
The Intel 65-nm process features second-generation uniaxial strained silicon channels, with a higher proportion of germanium atoms in the selectively deposited SiGe layers in the PFET source and drain regions, compared with the 90-nm process.
Also, Intel moved to silicon carbon at the etch stop, compared with silicon nitride at the 90-nm node. Bohr said the new etch stop material, and taller copper wires with a more aggressive aspect ratio of 1.8, result in a faster interconnect stack.
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