Apparently, the CPU will feature anti-piracy and anti-hacking security technology on the die, along with 1MB of shared L2 cache - up from the schematic's claim that there would be 512KB of L2 - and 64KB of L1 cache per core split 50:50 for instructions and data. Each core is enabled for simultaneous multi-threading - the ability to convince the host OS it's two cores rather than one. In other words, the OS - derived, says the document, from Windows NT - sees six logical cores rather than three physical ones.
Each core is said to be able to issue two instructions per clock, which is fewer than the PowerPC 970/G5's five. The document also mentions "128 vector (VMX) registers", when the G5, for example, has a single register file containing space for 32 architected registers and 48 renameable registers 128-bit vector instructions.
The GPU is said to contain a shader core equipped with 48 arithmetic units "that can execute 64 simultaneous threads on groups of 64 vertices or pixels" - whether they work on vertices or pixels, depends on the workload, apparently.
"The GPU has a peak pixel fill rate of 4+ gigapixels/sec (16 gigasamples/sec with 4_ antialiasing). The peak vertex rate is 500+ million vertices/sec. The peak triangle rate is 500+ million triangles/sec. The interesting point about all of these values is that they're not just theoretical-they are attainable with nontrivial shaders," the doucment states.
Del med dine venner