AMD Barton 3000+ in coming in early February and has a clock speed or 2.25Ghz and 512KB L2 cache. As Barton 3000+ clock speed is the same as the current 333Mhz FSB Athlon XP 2800+ so the additional 200+ PR rating comes from the additional 256KB L2 cache. The possibility of having 400Mhz FSB Athlon XP is good as NVIDIA continues to push for their nForce2 chipset to support it which designed to run optimally with 400Mhz system bus and Dual Channel DDR400 SDRAM.
AMD has also provide some updates on the HyperTransport 2.0 spec that will provide 3GBits/s to 5GBits/s for each pair of pins, the electrical contacts that physically transfer data. A 16-bit HyperTransport link would provide data transfer rates of 20GB/s at 5GBits/s per pin while a 32-bit will switch data at 40GB. The current HyperTransport links exchange data at 1.6GBits/s per pin pair, topping out at 12.8 gigabytes for 32-bit devices. The 2.0 specification will come out late this year or early next year.
Micron today has demonstrated a system running DDR-II 533Mhz (PC4300) and Infineon has showcased a DDR-II 667 (PC5400) module. According to Micron DDR SDRAM roadmap, we can expect to see Dual Channel DDR333 (2.5-3-3) at H1 and Dual Channel DDR400 (2.5-3-3) at H2 2003. Next year, we can see Dual Channel DDR533 (4-4-4), Dual Channel DDR333 (2-2-2) and Dual Channel DDR400 (3-3-3). Samsung is expected to produce 512MB DDR400 this coming April.
Del med dine venner