Intel afslører nye planer for high performance produkter

Intel afslører nye planer for high performance produkter

Under den internationale konference om supercomputerteknologi (ISC) annoncerede Intel Corporation planer om at levere nye produkter baseret på Intel® Many Integrated Core (MIC) arkitektur, som vil kreere en platform, der kan lave billioner af udregninger per sekund og samtidig beholde de fordele der findes ved standard Intel processorer. Med det første produkt, der har kodenavnet “Knights Corner,” målretter Intel produkterne high-performance computersegmenter, herunder videnskab og opdagelse samt finansiel- og klima simulation. ”Knights Corner” bliver baseret på Intels 22 nanometer fabrikationsproces som bruger transistorstrukturer så små som 22 milliarddele af en meter – og bruger Moores lov til at skalere mere end 50 Intel processorkerner på en enkelt chip.

 

 

 

SANTA CLARA, Calif. and HAMBURG, Germany, May 31, 2010 - During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel® Many Integrated Core (MIC) architecture that will create platforms running  at trillions of calculations per second, while also retaining the benefits of standard Intel processors.
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel’s 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore’s Law to scale to more than 50 Intel processing cores on a single chip. While the vast majority of workloads will still run best on award-winning Intel® Xeon® processors, Intel® MIC architecture will help accelerate select highly parallel applications.
Industry design and development kits codenamed “Knights Ferry” are currently shipping to select developers, and beginning in the second half of 2010, Intel will expand the program to deliver an extensive range of developer tools for Intel MIC architecture. Common Intel software tools and optimization techniques between Intel MIC architecture and Intel Xeon processors will support diverse programming models that will place unprecedented performance in the hands of scientists, researchers and engineers, allowing them to increase their pace of discovery and preserve their existing software investments. The Intel® MIC architecture is derived from several Intel projects, including “Larrabee” and such Intel Labs research projects as the Single-chip Cloud Computer.
 
“The CERN openlab team was able to migrate a complex C++ parallel benchmark to the Intel MIC software development platform in just a few days,” said Sverre Jarp, CTO of CERN openlab. "The familiar hardware programming model allowed us to get the software running much faster than expected.”
“Intel’s Xeon processors and now our new Intel® Many Integrated Core architecture products will further push the boundaries of science and discovery as Intel accelerates solutions to some of humanity’s most challenging problems,” said Kirk Skaugen, vice president and general manager of Intel’s Data Centre Group. “The Intel® MIC architecture will extend Intel’s leading HPC products and solutions that are already in nearly 82 percent of the world’s top supercomputers.  Today’s investments are indicative of Intel’s growing commitment to the global HPC community.”

SANTA CLARA, Calif. and HAMBURG, Germany, May 31, 2010 - During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel® Many Integrated Core (MIC) architecture that will create platforms running  at trillions of calculations per second, while also retaining the benefits of standard Intel processors.


Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel’s 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore’s Law to scale to more than 50 Intel processing cores on a single chip. While the vast majority of workloads will still run best on award-winning Intel® Xeon® processors, Intel® MIC architecture will help accelerate select highly parallel applications.Industry design and development kits codenamed “Knights Ferry” are currently shipping to select developers, and beginning in the second half of 2010, Intel will expand the program to deliver an extensive range of developer tools for Intel MIC architecture.


Common Intel software tools and optimization techniques between Intel MIC architecture and Intel Xeon processors will support diverse programming models that will place unprecedented performance in the hands of scientists, researchers and engineers, allowing them to increase their pace of discovery and preserve their existing software investments. The Intel® MIC architecture is derived from several Intel projects, including “Larrabee” and such Intel Labs research projects as the Single-chip Cloud Computer.


“The CERN openlab team was able to migrate a complex C++ parallel benchmark to the Intel MIC software development platform in just a few days,” said Sverre Jarp, CTO of CERN openlab. "The familiar hardware programming model allowed us to get the software running much faster than expected.”“Intel’s Xeon processors and now our new Intel® Many Integrated Core architecture products will further push the boundaries of science and discovery as Intel accelerates solutions to some of humanity’s most challenging problems,” said Kirk Skaugen, vice president and general manager of Intel’s Data Centre Group. “The Intel® MIC architecture will extend Intel’s leading HPC products and solutions that are already in nearly 82 percent of the world’s top supercomputers.  Today’s investments are indicative of Intel’s growing commitment to the global HPC community.”

 


Link: Intel

Skrevet den 31. May 2010. Nyheden er læst 1153 gang(e).

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